Since the early 1970s when the four-bit integrated circuit microprocessor was first introduced commercially, microprocessors and one chip microcomputers have fostered a virtual revolution in consumer electronic products. Currently microprocessors control a host of devices for which computer control would have been prohibitively expensive ten years ago.
In many consumer products and microprocessor based microcomputers a considerable amount of software is stored in read only memories (ROM)s.
In byte oriented computer processors, instructions containing memory addresses generally require several sequential fetches from memory. Most instructions containing memory references can be fetched from memory in one or two accesses (fetches), but in some microprocessors, memory reference instructions require three fetches from memory. The first fetch accesses the instruction byte which signifies the type of memory reference instruction. The second two bytes contain the two-byte address referenced in the memory reference instruction. A common format for such memory reference instructions places the most significant byte of the referenced memory address in the last byte fetched from memory.
Among currently available eight bit byte microprocessors for which three fetches are required for memory reference instructions and for which the most significant byte of a memory reference instruction is contained in the third fetch are the 8080 (Intel), 6502 (MOS Technology), and the Z-80 (Zilog).
As is known to those skilled in the art, standardized software may be most economically distributed for use in microprocessors via read only memories. The least expensive vehicle for propagating software directly usable by a microprocessor is the mass produced mask programmed read only memory. The economics of production of such read only memories come from the ability to produce large numbers of identical devices because there is a relatively large setup cost for producing a mask programmed ROM but the cost per unit manufactured decreases as the setup cost is distributed over a large number of units.
It will therefore be appreciated that in order to distribute general purpose software it is highly desirable to be able to use a generalized read only memory which may be inserted into any available microprocessor based system. Execution of instructions sequentially from a read only memory causes no problem. However, when memory reference instructions such as JUMP instructions are encountered, the address contained in the microprocessor program counter will be derived in whole or in part from data stored in the ROM. It will therefore be appreciated that in order to jump from one memory location to another within a ROM program, the microprocessor system must be designed to treat the address of the ROM in the same manner in which the memory reference instructions stored in the ROM treat its address. If this is not accomplished, a read only memory could provide a microprocessor with an instruction to jump to what the ROM program considered another address within the ROM, but due to the addressing scheme used in the microprocessor system, would cause the processor to fetch an instruction from an entirely unrelated memory location.
In the past it has been common to encounter ROM programs written with zero base addresses. However, if a user of a predesigned microprocessor system having a different ROM in the zero base address location wishes to use yet another zero base addressed ROM, the prior art has provided only relatively complex and expensive ways of modifying memory reference instructions contained within the second ROM in order to fit the addressing scheme of the preexisting system.
For example the prior art has included a scheme for writing program segments out of a read only memory into a random access memory and identifying portions of memory reference instructions, and using a combination of software and hardware to modify the address bytes in memory reference instructions. The main processor is then designed to execute instructions contained in the random access memory.
Another device has included a relatively complicated base address register and an adder for modifying the address supplied to the microprocessor program counter from memory reference instructions contained in a ROM.
The prior art has heretofore not provided a simple and inexpensive scheme of locating a ROM within the memory addressing scheme of a microprocessor based system so that memory reference instructions contained within the ROM will not cause the program counter to jump to an improper memory location and which also allows the ROM to be placed in different address locations within different microprocessor based systems without extensive modification to either hardware or ROM software.